The present invention relates to a DC-to-DC converter which receives a DC voltage from a battery or the like and supplies a controlled DC voltage to a load, and more particularly to a DC-to-DC converter capable of carrying out voltage step-up and step-down operation in an input-output noninverting manner in which the polarity of the input voltage is the same as that of the output voltage.
A DC-to-DC converter which receives a DC voltage from a battery or the like and supplies a DC voltage obtained by voltage step-up or step-down operation in an input-output noninverting manner is disclosed in the Japanese Publication of examined patent application No. Sho 58-40913. FIG. 13 is the circuit diagram of the DC-to-DC converter disclosed in the Japanese Publication of examined patent application No. Sho 58-40913. FIG. 14a to FIG. 14d are waveform diagrams showing the operation of the DC-to-DC converter.
In the DC-to-DC converter shown in FIG. 13, the cathode of a first diode 3 is connected via a first switch 2 to the positive pole 1A of a DC input power source 1 generating a DC voltage Ei. The anode of the diode 3 is connected to the negative pole 1B of the DC input power source 1. One terminal of a second switch 5 is connected to the cathode of the diode 3 via an inductor 4. The other terminal of the second switch 5 is connected to the negative pole 1B. The switches 2 and 5 are formed of switches capable of turning on and turning off at a high frequency, such as a semiconductor switch. The anode of a second diode 6 is connected to the connection point of the inductor 4 and the switch 5, and its cathode is connected to the negative pole 1B via an output capacitor 7. A load 8 is connected in parallel with the output capacitor 7, and a DC output voltage Eo across both the terminals of the output capacitor 7 is applied to the load 8. As shown in FIG. 14a and FIG. 14b, the first switch 2 and the second switch 5 turn on and turn off in the same constant switching period T. The ratio of the ON time period of the switch 2 to one switching period T is designated by xcex41, which is a duty ratio in the switch 2. The ratio of the ON time period of the switch 5 to one switching period T is designated by xcex42, which is a duty ratio in the switch 5. The duty ratio xcex41 is made larger than the duty ratio xcex42 as shown in the figures. The ratio of the ON time period is referred to as a duty ratio when represented by percentage. For convenience in explanation, it is assumed that the diodes 3 and 6 have no forward voltage drops in the conductive states.
When both the switch 2 and the switch 5 are in ON-state, the voltage Ei of the DC input power source 1 is applied to the inductor 4. The time period of this voltage application is represented by xcex42xc2x7T as shown in FIG. 14b. At this time, current flows from the DC input power source 1 to the inductor 4, whereby magnetic energy is stored. Subsequently, when the switch 5 turns OFF, the diode 6 becomes conductive (turns ON) as shown in FIG. 14d, and the voltage difference (Eixe2x88x92Eo) between the DC input voltage Ei and the DC output voltage Eo is applied to the inductor 4. The time period of this voltage application is represented by (xcex41xe2x88x92xcex42)xc2x7T. During this application time period, current flows from the DC input power source 1 to the output capacitor 7 via the inductor 4. Then, when the switch 2 turns OFF, the diode 3 turns ON as shown in FIG. 14c, and the DC output voltage Eo is applied to the inductor 4 in the inverse direction. The time period of this voltage application is represented by (1xe2x88x92xcex41)xc2x7T. During this application time period, current flows from the inductor 4 to the output capacitor 7, whereby the stored magnetic energy is released.
By repeating the storage and release of the magnetic energy as described above, electric power is supplied from the output capacitor 7 to the load 8. In a stable operation state wherein the storage and release of the magnetic energy of the inductor 4 are balanced with each other, the sum of the integrals of the voltages with respect to time is zero, whereby Equation (1) is established.
Eixc2x7xcex42xc2x7T+(Eixe2x88x92Eo)(xcex41xe2x88x92xcex42)T=Eo(1xe2x88x92xcex41)Txe2x80x83xe2x80x83(1)
By arranging Equation (1), Equation (2) is obtained.                               E          ⁢                      xe2x80x83                    ⁢          o                =                                            δ1                              1                -                δ2                                      ·            E                    ⁢                      xe2x80x83                    ⁢          i                                    (        2        )            
Equation (2) represents a conversion characteristic. When xcex42=0, Equation (2) renders Equation (3), whereby the converter operates as a voltage step-down converter.
Eo=xcex41xc2x7Eixe2x80x83xe2x80x83(3)
When xcex41=1, Equation (2) becomes Equation (4), whereby the converter operates as a voltage step-up converter.                               E          ⁢                      xe2x80x83                    ⁢          o                =                                            1                              1                -                δ2                                      ·            E                    ⁢                      xe2x80x83                    ⁢          i                                    (        4        )            
By controlling the duty ratios of the switches 2 and 5, the value of xcex41/(1xe2x88x92xcex42) in Equation (2) can be set at any given value in the range of from zero (0) to infinity. Hence, this DC-to-DC converter serves theoretically as a voltage step-up and step-down converter capable of obtaining a desired DC output voltage Eo from the DC input voltage Ei having any given value. For example, U.S. Pat. No. 4,395,675 discloses a DC-to-DC converter controlling the duty ratios of two switches.
FIG. 15 shows a circuit example of a conventionally well-known DC-to-DC converter including a control section 9 for controlling the duty ratios of the switches 2 and 5. FIG. 16a to FIG. 16c are waveform diagrams showing the waveforms of signals at various parts thereof.
In FIG. 15, an error amplification circuit 20 in the control section 9 includes a reference voltage source 200 and resistors 201 and 202 which are connected in series for detecting the DC output voltage Eo. The error amplification circuit 20 includes also an error amplifier 203 whereto are inputted the reference voltage Er of the reference voltage source 200 and a detection voltage Ed obtained by voltage division of the DC output voltage Eo by using the resistors 201 and 202. A phase compensating capacitor 204 is connected across the input and output terminals of the error amplifier 203, and an error voltage Ve is output from the output terminal. An oscillation circuit 11 outputs a sawtooth voltage Vt which increases and decreases alternately between two values at a predetermined period. The period of the sawtooth voltage Vt is represented by T and the amplitude thereof is represented by xcex94Vt. The level of the voltage rises linearly and drops sharply. A pulse-width control circuit 12 includes an adder 120 for adding a predetermined offset voltage Vos to the error voltage Ve, a first comparator 121 for comparing the output voltage (Ve+Vos) of the adder 120 with the sawtooth voltage Vt, and a second comparator 122 for comparing the error voltage Ve with the sawtooth voltage Vt. The output of the comparator 121 is a first drive signal Vd1 for turning ON and turning OFF the first switch 2; the output of the comparator 122 is a second drive signal Vd2 for turning ON and turning OFF the second switch 5.
The waveform diagram of FIG. 16a shows the sawtooth voltage Vt, the error voltage Ve and the output voltage (Ve+Vos) of the adder 120. FIG. 16b and FIG. 16c show the first drive signal Vd1 and the second drive signal Vd2, respectively. In a left end portion A of the waveform diagram of FIG. 16a, the sawtooth voltage Vt is higher than the error voltage Ve, and the waveform of the sawtooth voltage Vt intersects the waveform of the output voltage (Ve+Vos). In a central portion B, the waveform of the sawtooth voltage Vt intersects the waveform of the error voltage Ve and the waveform of the output voltage (Ve+Vos). In a right end portion C, the sawtooth voltage Vt is lower than the output voltage (Ve+Vos).
The operation of the control section 9 shown in FIG. 15 will be described below referring to FIG. 16a to FIG. 16c. When the detection voltage Ed obtained by dividing the DC output voltage Eo by using the resistors 201 and 202 rises and becomes higher than the reference voltage Er of the reference voltage source 200, the error voltage Ve output from the error amplification circuit 20 lowers, and vice versa. In other words, when the DC output voltage Eo rises owing to the rising of the DC input voltage Ei or the decrease of the load 8, the error voltage Ve lowers. On the other hand, when the DC output voltage Eo lowers owing to the lowering of the DC input voltage Ei or the increase of the load 8, the error voltage Ve rises.
First, when the DC input voltage Ei is high and the sawtooth voltage Vt is higher than the error voltage Ve as shown in the range A of FIG. 16a, the drive signal Vd2 remains a logical L level (hereafter simply referred to as xe2x80x9cLxe2x80x9d), whereby the switch 5 remains OFF state. Hence, the duty ratio xcex42 or the switch 5 is zero (xcex42=0). The switch 2 is turned ON and turned OFF alternately by the drive signal Vd1, and the duty ratio xcex41 becomes smaller as the error voltage Ve lowers. In this case, the relationship between the DC input voltage Ei and the DC output voltage Eo of the DC-to-DC converter is represented by Equation (3), and the DC-to-DC converter operates as a voltage step-down converter.
Next, when the difference between the DC input voltage Ei and the DC output voltage Eo is small and the waveform of the sawtooth voltage Vt intersects the waveform of the error voltage Ve and the waveform of the output voltage (Ve+Vos) of the adder 120 as shown in the range B of FIG. 16a, the switch 2 makes alternate ON-OFF action by the drive signal Vd1, and the switch 5 makes alternate ON-OFF action by the drive signal Vd2. The duty ratio xcex41 and the duty ratio xcex42 become smaller as the error voltage Ve become lower. In this case, the relationship between the DC input voltage Ei and the DC output voltage Eo of the DC-to-DC converter is represented by Equation (2), and the DC-to-DC converter operates as a voltage step-up and step-down converter.
When the DC input voltage Ei is low and when the sawtooth voltage Vt is lower than the output voltage (Ve+Vos) as shown in the range C of FIG. 16a, the drive signal Vd1 remains a logical H level (hereafter simply referred to as xe2x80x9cHxe2x80x9d), whereby the switch 2 remains ON state. Hence, the duty ratio xcex41 of the switch 2 is 1 (xcex41=1). On the other hand, the duty ratio xcex42 of the switch 5 increases as the error voltage Ve rises. In this case, the relationship between the DC input voltage Ei and the DC output voltage Eo of the DC-to-DC converter is represented by Equation (4), and the DC-to-DC converter operates as a voltage step-up converter.
The DC-to-DC converter capable of carrying out voltage step-up and step-down operation has a high flexibility in the setting of the DC output voltage. Therefore, the DC-to-DC converter is occasionally used so that the setting value of the DC output voltage is changed depending on the state of the load. In this case, the reference voltage Er of the reference voltage source 200 is changed depending on a signal from the load 8. When the reference voltage Er is changed, it is preferable that the DC output voltage Eo is changed depending on the change of the reference voltage Er at a high xe2x80x9cresponse speedxe2x80x9d. In the above-mentioned conventional DC-to-DC converter, the response speed depends on the changing speed of the error voltage Ve output from the error amplifier 203. In a control system of the DC-to-DC converter, in order to secure stability, the phase compensating capacitor 204 is connected across the input terminal and the output terminal of the error amplifier 203, for example. By the connection of the phase compensating capacitor 204, the response speed of the error amplifier 203 lowers and its cutoff frequency generally lowers to one several tenths of its switching frequency. The switching frequency is usually several tens to several hundreds of kHz. Hence, the response time of the DC-to-DC converter is several hundred microseconds when the reference voltage changes stepwise. The response time of several hundred microseconds is not sufficiently short for application of the DC-to-DC converter to various electronic apparatuses. There is a problem that the DC-to-DC converter cannot sufficiently cope with load changes in various electronic apparatuses.
An object of the present invention is to solve the above-mentioned problem and to provide a DC-to-DC converter having an improved response speed and being capable of voltage step-up and step-down operation.
The DC-to-DC converter in accordance with the present invention controls a DC output voltage so as to become equal to a predetermined output setting voltage by raising or lowering the DC output voltage with respect to a DC input voltage. The DC-to-DC converter comprises switches for switching a DC current inputted from an input terminal, an inductor which stores and releases electromagnetic energy generated by current switched on and off by the switches, an error amplification circuit for outputting an error voltage obtained by comparing a DC output voltage obtained by rectifying and smoothing a voltage generated at the output terminal of the inductor with a predetermined reference voltage, and a pulse-width control circuit for controlling the switching operation of the switches on the basis of the error voltage. The DC-to-DC converter further comprises a charging switch connected between the input terminal and the output terminal thereof, a first comparison circuit for comparing a first voltage lower than the output setting voltage with the DC output voltage and for obtaining the output of a comparison result, a second comparison circuit for comparing a second voltage lower than the DC input voltage with the DC output voltage and for obtaining the output of a comparison result, and a drive circuit for receiving the output of the first comparison circuit and the output of the second comparison circuit and for turning ON the charging switch when the DC output voltage is lower than the first voltage and the second voltage.
According to the present invention, the charging switch is provided for making and breaking the connection between the input terminal and the output terminal of the DC-to-DC converter. In a control section wherein the first voltage lower than the output setting voltage by a predetermined voltage and the second voltage lower than the DC input voltage by a predetermined voltage are set, when the DC output voltage is lower than the first voltage and the second voltage, the charging switch is turned ON. Hence, in the case that the DC output voltage becomes lower than the output setting voltage owing to an external factor, the response speed to rise the DC output voltage so as to reach the output setting voltage can be greatly increased.
The DC-to-DC converter in accordance with the present invention comprises a voltage application section to which the output of the first comparison circuit is input. The voltage application section changes the error voltage so that the pulse-width control circuit turns ON and OFF the switches at the maximum duty ratios, when the DC output voltage is lower than the first voltage.
In the case that the output setting voltage is higher than the DC input voltage and the DC output voltage is lower than the first voltage, the DC-to-DC converter is operated at its maximum output. The operation is continued so that the maximum output is delivered after the charging switch is turned OFF and until the DC output voltage reaches the first voltage. Hence, it is possible to obtain an effect capable of further shortening the response time.
The drive circuit of the DC-to-DC converter in accordance with the present invention comprises a first maximum ON time period setting circuit for setting a predetermined maximum value at the ON time period of the charging switch.
By providing a limit for the maximum value of the ON time period of the charging switch, the drive circuit has a protection function for preventing the charging switch from breaking even if the charging switch turns ON when the load is shorted.
A DC-to-DC converter in accordance with another aspect of the present invention, for the sake of converting a DC input voltage applied to an input terminal and outputting a desired DC output voltage from an output terminal, comprises a switch for making and breaking the connection between the input terminal and the output terminal, and a control section for setting a first voltage lower than an output setting voltage of a desired value in the DC output voltage and a second voltage lower than the input voltage, and for closing the switch when the DC output voltage is lower than the first voltage and the second voltage.
According to the present invention, when the DC output voltage lowers at the output terminal and becomes lower than the first and second voltages, the switch connected between the input terminal and the output terminal of the DC-to-DC converter is turned ON. Hence, current is directly supplied from the input terminal to the output terminal, whereby the voltage at the output terminal can be raised quickly.
A DC-to-DC converter in accordance with another aspect of the present invention, for the sake of converting a DC input voltage applied to an input terminal and outputting a desired DC output voltage from an output terminal, comprises a switch for making and breaking the connection between the input terminal and the output terminal, and a control section for setting a first voltage lower than an output setting voltage of a desired value in the DC output voltage and a second voltage lower than the input voltage, and for closing the switch when the DC output voltage is lower than the first voltage and the second voltage. A discharging switch is connected across both the output terminals, and the discharging-switch is turned ON when the DC output voltage is higher than a third voltage set at a value higher than the output setting voltage.
In the DC-to-DC converter in accordance with the present invention, the third voltage is set so as to be higher than the output setting voltage by a predetermined voltage, and the discharging switch is turned ON when the output setting voltage is higher than the third voltage. Hence, in the case that the DC output voltage becomes higher than the output setting voltage owing to a factor, the response speed to rise the DC output voltage so as to reach the output setting voltage can be greatly increased.
In addition, the DC-to-DC converter in accordance with the present invention further comprises means for limiting the ON time period of the discharging switch at a predetermined maximum limit.
By providing the maximum limit in the ON time period of the discharging switch, the discharging switch can be protected so as not to break even if the discharging switch turns ON when the DC output voltage rises abnormally.
A DC-to-DC converter in accordance with another aspect of the present invention comprises switches for switching a current inputted from an input terminal, an inductor which stores and releases electromagnetic energy generated depending on the current switched on and off by the switches, and a capacitor charged by the current obtained by the storage and release of the electromagnetic energy of the inductor, and for obtaining a DC output voltage at output terminals. The DC-to-DC converter further comprises an error amplification circuit for comparing the DC output voltage with a predetermined reference voltage and for outputting an error voltage, a pulse-width control circuit for applying pulse signals having predetermined duty ratios to the switches and for controlling the duty ratios so that the DC output voltage becomes a desired voltage on the basis of the error voltage, a comparison circuit for comparing the DC output voltage with the predetermined reference voltage and for outputting a signal obtained as the result of the comparison, when the DC output voltage becomes higher than the desired voltage, and a discharging switch driven by the signal obtained as the result of the comparison made by the comparison circuit, and for discharging the capacitor.
According to the present invention, when the DC output voltage at the output terminal becomes higher than the desired voltage, the discharging, switch is driven, whereby the capacitor is discharged, and the DC output voltage can be lowered quickly.